Acknowledgements – ZX sizif 512K Project – all credits to Eugene Lozovoy.

After receiving most of the parts, I started populating the board; I applied solder paste for the SMD parts using the stencil that came together with the PCBs, baked it in the reflow oven, and handed soldered SMD parts on the bottom side with hot air.

The power circuitry is populated on the board next to test the (ULA) CPLD, the most crucial part of this board. Sadly the primary regulator was missing from my package, and I have to reorder it from China. To continue testing, I inserted 5v from my bench power supply to realise I had the polarity reversed; after accessing the damages, the CPLD and buffers were all dead.

I don’t have another CPLD on hand, so I have to wait for the next shipment.

The CPLD and Regulator came in the mail about two weeks later, and I was able to populate and test them, the bare circuit works, and I was able to detect and program the CPLD on the JTAG chain.

The rest of the parts go onto the board except the PS2 keyboard interface, which I have no intention to use. All main ICs are mounted on sockets as I am unsure if the 2nd hand chips work.

I programmed the Flash ROM next without any incident.

I worked through the night to get everything up on a Friday evening as I was excited.

The video encoder needs some tuning; after I plugged in everything, I managed only to get a stable black border and white screen, looks like the CPU, RAM, or ROM is not working.

magenta screen

Somehow one of the transistors broke and rendered a magenta screen. I replaced it, and the screen colour went back to normal.

The next thing regarding the CPU is to check the clock lines; no clock means no execution. Indeed, the CPU is not receiving a clock signal; tracing upstream to the 28 Mhz oscillator, it was not running.

The 28Mhz Crystal I bought from China doesn’t have any specifications, so I must guess some of the values to make it work.

The circuit that feeds the clock line is a typical pierce oscillator circuit, so my guess is there is too little gain to start a feedback loop; replacing the 1M resistor with 820K started the oscillator running.

garbled screen

Starting the clock didn’t fix everything; now, I get a garbled screen on boot. However, I now know the CPU and ROM is working, as the diagnostic code in the ROM chip runs without any issues. So the fault should be the RAM.

I suspected that it could be a solder bridge on the CPLD connecting to the RAM; I reinspected the board repeatedly to no avail.

At 4 am, I am exhausted; I took a break and took another look at the problem I am facing; the following strategy is to check all signals from the CPLD. I removed the CPU, RAM and ROM, and wrote a new VHDL code to send a 1Khz signal to all pins.

Slowly tracing the pins one by one, I found “WR” on the system bus shorted to the ground; it all makes sense now why the ROM would run, but the RAM is garbled; the ROM doesn’t use the “WR” bus. The culprit was traced to the area next to the write enable header; I placed the Regulator ground tab out of the line, shorting the WR bus through a break in the solder mask to the ground. I cut the PCB trace to disable the header pin as I do not want to remove and resolder the regulator.

The familiar copyright screen was a welcome sight after removing the short. I was really excited but tired too, time to catch some zzzzzs.

link to part 1

link to part 2